Module 
COLOR TYPE -TRT
320 x RGB(H) x 240(V)        TFT (3.5 inch) Model : EDG350A02TXOGA
DIMENSIONAL DRAWING DOWNLOAD    form in PDF format
FEATURE : BLOCK DIAGRAM
  1. Display method: Active matrix TFT
  2. Display mode: Transmissive
  3. Active area(mm): 70.08(W)x52.56(H)
  4. Screen size(inch): 3.5 inch diagonal
  5. Pixel size(mm): 0.037(W)x0.219(H)
  6. Pixel configuration: Stripe
  7. Display color:262K
  8. Surface treatment: Anti Glare
  9. Driver IC:HX8238-A
  10. Weight(g): 25
ELECTRO-OPTICAL CHARACTERISTICS
ITEM SYMBOL CONDITIONS MIN TYPE MAX UNIT REMARK
Viewing Angle TOP H CR10 - 15   degree Note 3
Bottom L - 35 -
Left - 45 -
Right - 45 -
Response Time(Tr+Tf) =0   50 70 ms Note 4
Brightness Center 280 320 - cd/m2  
Contrast ratio CR At optimize viewing - 250 - - Note 5
Color Chromaticity White Xw Viewing normal angle , =0 0.282 0.312 0342 - Note 6
Yw 0.319 0.349 0.379
Red Xr 0.610 0.640 0.670 - -
Yr 0.314 0.344 0.374
Green Xg 0.268 0.298 0.328 - -
Yg 0.553 0.583 0.613
Blue Xb 0.102 0.132 0.162 - -
Yb 0.107 0.137 0.167
I/O CONNECTION
NO. PIN name I/O DESCRIPTION NO. PIN name I/O DESCRIPTION
1 K1 P

LED1(-)

2 K2 P

LED2(-)

3 A2 P LED2(+) 4 A1 P LED1(+)
5 GND P

System ground

6~7 NC  

No connect

8 RESB I

System reset pin

9 CSB I Chip select pin of serial interface
10 SCK I Clock pin of serial interface 11 SDI I Data input pin in serial mode
12~19 B0~B7 I Blue data 20~27 G0~G7 I Green data
28~35 R0~R7 I Red data 36 DEN I Display enable pin from controller
37 HSYNC I Line synchronization signal 38 VSYNC - Frame synchronization signal
39 DOTCLK I Dot –clock signal and oscillator source 40 SHUT I Display shut down pin to put the diver into sleep mode connect to VDD for sleep mode
connect to GND for normal operating mode
41 TB I Input pin to select the Gate driver scan direction -Connect to GND for Gate scan from G239 to G0(reverse scan) -Connect to VDD for Gate from G0 to G239(normal scan) 42 REV I Input pin to select the display reversion - connect to VDD mapping data ‘0’ to maximum pixel voltage for normally white panel - connect to GND for mapping data ‘0’ to minimum pixel voltage for normally black panel
43 RL I Input pin to select the Source driver data shift direction - connect to VDD for display first RGB data at S0-S2 - connect to GND for display first RGB data at S959-S957 44 BGR I Input pin to select the color mapping -connect to VDD for Blue-Green-Red mapping; -connect to GND for Red-Green-Blue mapping
45~47 SEL0~SEL2 I Input pin to select input interface mode 48 VDD P Voltage input pin for internal logic
49 VCI P Booster input voltage pin.- connect to voltage source between 2.5 to 3.6V 50~54 NC - No connect
55~56 GND P System ground 57 X1 I X-Right(Without use)
58 Y1 I Y-Bottom(without use) 59 X2 I X-Left(without use)
60 Y2 I Y-Up(without use)